From mboxrd@z Thu Jan 1 00:00:00 1970 Delivery-date: Wed, 03 Apr 2024 18:48:25 +0200 Received: from metis.whiteo.stw.pengutronix.de ([2a0a:edc0:2:b01:1d::104]) by lore.white.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1rs3mj-006nCS-0X for lore@lore.pengutronix.de; Wed, 03 Apr 2024 18:48:25 +0200 Received: from localhost ([127.0.0.1] helo=metis.whiteo.stw.pengutronix.de) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1rs3mi-000841-G7; Wed, 03 Apr 2024 18:48:24 +0200 Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1rs3mb-0007tw-FA; Wed, 03 Apr 2024 18:48:17 +0200 Received: from [2a0a:edc0:0:1101:1d::54] (helo=dude05.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1rs3mb-00ADLt-1g; Wed, 03 Apr 2024 18:48:17 +0200 Received: from localhost ([::1] helo=dude05.red.stw.pengutronix.de) by dude05.red.stw.pengutronix.de with esmtp (Exim 4.96) (envelope-from ) id 1rs3ma-00GUKn-31; Wed, 03 Apr 2024 18:48:16 +0200 From: Ahmad Fatoum To: distrokit@pengutronix.de Date: Wed, 3 Apr 2024 18:48:11 +0200 Message-Id: <20240403164815.3929378-5-a.fatoum@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240403164815.3929378-1-a.fatoum@pengutronix.de> References: <20240403164815.3929378-1-a.fatoum@pengutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [DistroKit] [PATCH v3 4/8] v7a: barebox: enable STM32MP135F-DK support X-BeenThere: distrokit@pengutronix.de X-Mailman-Version: 2.1.29 Precedence: list List-Id: DistroKit Mailinglist List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Ahmad Fatoum Sender: "DistroKit" X-SA-Exim-Connect-IP: 127.0.0.1 X-SA-Exim-Mail-From: distrokit-bounces@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false barebox has had support for the STM32MP135F-DK for a while, but only recently was it extended to support the full shtick of talking to OP-TEE to control clocks and resets. As the barebox version we have in DistroKit supports this, let's enable building support for the development kit. Signed-off-by: Ahmad Fatoum Link: https://lore.pengutronix.de/20240315211240.3016716-9-a.fatoum@pengutronix.de Signed-off-by: Robert Schwebel --- v1 -> v3: - no change --- configs/platform-v7a/barebox-stm32mp.config | 24 ++++++++++++++++--- .../platform-v7a/barebox-stm32mp.config.diff | 22 ++++++++++++++++- configs/platform-v7a/dts/bootstate.dtsi | 3 ++- .../platform-v7a/rules/barebox-stm32mp.make | 3 ++- 4 files changed, 46 insertions(+), 6 deletions(-) diff --git a/configs/platform-v7a/barebox-stm32mp.config b/configs/platform-v7a/barebox-stm32mp.config index ba40c44bdb74..f2e61e7165c1 100644 --- a/configs/platform-v7a/barebox-stm32mp.config +++ b/configs/platform-v7a/barebox-stm32mp.config @@ -47,8 +47,9 @@ CONFIG_CPU_32v7=y # # CONFIG_BOOT_ENDIANNESS_SWITCH is not set CONFIG_ARCH_NR_GPIO=416 +CONFIG_ARCH_STM32MP13=y CONFIG_ARCH_STM32MP157=y -# CONFIG_MACH_STM32MP13XX_DK is not set +CONFIG_MACH_STM32MP13XX_DK=y CONFIG_MACH_STM32MP15XX_DKX=y CONFIG_MACH_LXA_MC1=y # CONFIG_MACH_SEEED_ODYSSEY is not set @@ -216,6 +217,9 @@ CONFIG_EXTERNAL_DTS_FRAGMENTS="${PTXDIST_PLATFORMCONFIGDIR}/dts/bootstate.dtsi" # # OP-TEE loading # +CONFIG_HAVE_OPTEE=y +CONFIG_OPTEE_SIZE=0x03000000 +CONFIG_OPTEE_SHM_SIZE=0x400000 # CONFIG_BOOTM_OPTEE is not set # end of OP-TEE loading @@ -633,7 +637,9 @@ CONFIG_HAVE_CLK=y CONFIG_CLKDEV_LOOKUP=y CONFIG_COMMON_CLK=y CONFIG_COMMON_CLK_OF_PROVIDER=y +CONFIG_COMMON_CLK_STM32MP135=y CONFIG_COMMON_CLK_STM32MP157=y +CONFIG_COMMON_CLK_SCMI=y CONFIG_COMMON_CLK_GPIO=y # @@ -715,6 +721,7 @@ CONFIG_PWM=y CONFIG_PWM_STM32=y CONFIG_HWRNG=y CONFIG_HWRNG_STM32=y +CONFIG_HW_RANDOM_OPTEE=y # # DMA support @@ -752,6 +759,7 @@ CONFIG_NVMEM=y # CONFIG_NVMEM_SNVS_LPGPR is not set CONFIG_STM32_BSEC=y CONFIG_STM32_BSEC_WRITE=y +CONFIG_STM32_BSEC_OPTEE_TA=y # # Bus devices @@ -764,6 +772,7 @@ CONFIG_REGULATOR_STM32_PWR=y CONFIG_REGULATOR_STM32_VREFBUF=y CONFIG_REGULATOR_STPMIC1=y # CONFIG_REGULATOR_ANATOP is not set +CONFIG_REGULATOR_ARM_SCMI=y # # Remoteproc drivers @@ -776,6 +785,7 @@ CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_RESET_CONTROLLER=y CONFIG_RESET_SIMPLE=y # CONFIG_RESET_IMX7 is not set +CONFIG_RESET_SCMI=y # CONFIG_RTC_CLASS is not set # @@ -786,7 +796,13 @@ CONFIG_RESET_SIMPLE=y # # ARM System Control and Management Interface Protocol # -# CONFIG_ARM_SCMI_PROTOCOL is not set +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCMI_HAVE_TRANSPORT=y +CONFIG_ARM_SCMI_HAVE_SHMEM=y +CONFIG_ARM_SCMI_HAVE_MSG=y +CONFIG_ARM_SCMI_TRANSPORT_OPTEE=y +CONFIG_ARM_SCMI_TRANSPORT_SMC=y +# CONFIG_ARM_SCMI_POWER_DOMAIN is not set # end of ARM System Control and Management Interface Protocol # end of Firmware Drivers @@ -851,7 +867,8 @@ CONFIG_STM32_FMC2_EBI=y CONFIG_RESET_STM32=y # CONFIG_VIRTIO_MENU is not set # CONFIG_MAILBOX is not set -# CONFIG_TEE is not set +CONFIG_TEE=y +CONFIG_OPTEE=y # end of Drivers # @@ -936,6 +953,7 @@ CONFIG_NLS=y CONFIG_ARCH_HAS_STACK_DUMP=y CONFIG_ARCH_HAS_DATA_ABORT_MASK=y CONFIG_ARCH_HAS_ZERO_PAGE=y +CONFIG_IDR=y # end of Library routines # diff --git a/configs/platform-v7a/barebox-stm32mp.config.diff b/configs/platform-v7a/barebox-stm32mp.config.diff index eddcb3a5ef5b..5f8844e02d88 100644 --- a/configs/platform-v7a/barebox-stm32mp.config.diff +++ b/configs/platform-v7a/barebox-stm32mp.config.diff @@ -3,6 +3,7 @@ CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_ARCH_NR_GPIO=416 CONFIG_ARCH_STM32=y +CONFIG_ARCH_STM32MP13=y CONFIG_ARCH_STM32MP157=y CONFIG_ARCH_STM32MP=y # CONFIG_ARCH_TEXT_BASE is undefined @@ -11,6 +12,13 @@ CONFIG_ARM_BOARD_APPEND_ATAG=y # CONFIG_ARM_BOARD_PREPEND_ATAG is not set CONFIG_ARM_PSCI_CLIENT=y CONFIG_ARM_PSCI_OF=y +CONFIG_ARM_SCMI_HAVE_MSG=y +CONFIG_ARM_SCMI_HAVE_SHMEM=y +CONFIG_ARM_SCMI_HAVE_TRANSPORT=y +# CONFIG_ARM_SCMI_POWER_DOMAIN is not set +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCMI_TRANSPORT_OPTEE=y +CONFIG_ARM_SCMI_TRANSPORT_SMC=y # CONFIG_ARM_SECURE_MONITOR is undefined CONFIG_AT803X_PHY=y # CONFIG_BOARD_ARM_GENERIC_DT is not set @@ -30,6 +38,8 @@ CONFIG_CMD_POWEROFF=y # CONFIG_CMD_PWM is not set # CONFIG_CMD_SPI is undefined # CONFIG_CMD_STACKSMASH is not set +CONFIG_COMMON_CLK_SCMI=y +CONFIG_COMMON_CLK_STM32MP135=y CONFIG_COMMON_CLK_STM32MP157=y CONFIG_COMPILE_LOGLEVEL=6 # CONFIG_CONSOLE_ACTIVATE_FIRST is not set @@ -52,11 +62,14 @@ CONFIG_EEPROM_AT24=y CONFIG_GENERIC_PHY=y # CONFIG_GPIO_74164 is undefined # CONFIG_GPIO_RASPBERRYPI_EXP is undefined +CONFIG_HAVE_OPTEE=y CONFIG_HWRNG_STM32=y +CONFIG_HW_RANDOM_OPTEE=y # CONFIG_I2C_ALGOBIT is undefined # CONFIG_I2C_BCM283X is undefined # CONFIG_I2C_GPIO is not set CONFIG_I2C_STM32=y +CONFIG_IDR=y CONFIG_LED_PWM=y # CONFIG_LED_TRIGGERS is not set # CONFIG_LIBFDT is undefined @@ -71,7 +84,7 @@ CONFIG_MACH_LXA_MC1=y # CONFIG_MACH_RPI_CM3 is undefined # CONFIG_MACH_RPI_COMMON is undefined # CONFIG_MACH_SEEED_ODYSSEY is not set -# CONFIG_MACH_STM32MP13XX_DK is not set +CONFIG_MACH_STM32MP13XX_DK=y CONFIG_MACH_STM32MP15XX_DKX=y CONFIG_MACH_STM32MP15X_EV1=y # CONFIG_MCI_BCM283X is undefined @@ -108,6 +121,9 @@ CONFIG_NVMEM=y # CONFIG_NVMEM_REBOOT_MODE is not set # CONFIG_NVMEM_RMEM is not set # CONFIG_NVMEM_SNVS_LPGPR is not set +CONFIG_OPTEE=y +CONFIG_OPTEE_SHM_SIZE=0x400000 +CONFIG_OPTEE_SIZE=0x03000000 # CONFIG_PARTITION_DISK_EFI_GPT_COMPARE is not set # CONFIG_PARTITION_DISK_EFI_GPT_NO_FORCE is not set CONFIG_PBL_CONSOLE=y @@ -122,6 +138,7 @@ CONFIG_PWM_STM32=y CONFIG_REGMAP_FORMATTED=y CONFIG_REGMAP_I2C=y # CONFIG_REGULATOR_ANATOP is not set +CONFIG_REGULATOR_ARM_SCMI=y # CONFIG_REGULATOR_BCM283X is undefined CONFIG_REGULATOR_FIXED=y CONFIG_REGULATOR_STM32_PWR=y @@ -130,6 +147,7 @@ CONFIG_REGULATOR_STPMIC1=y CONFIG_REMOTEPROC=y CONFIG_RESET_CONTROLLER=y # CONFIG_RESET_IMX7 is not set +CONFIG_RESET_SCMI=y CONFIG_RESET_SIMPLE=y CONFIG_RESET_STM32=y # CONFIG_SPI is not set @@ -139,6 +157,7 @@ CONFIG_STACKPROTECTOR=y CONFIG_STACKPROTECTOR_STRONG=y CONFIG_STACK_GUARD_PAGE=y CONFIG_STM32_BSEC=y +CONFIG_STM32_BSEC_OPTEE_TA=y CONFIG_STM32_BSEC_WRITE=y CONFIG_STM32_FMC2_EBI=y CONFIG_STM32_IMAGE=y @@ -146,6 +165,7 @@ CONFIG_STM32_IWDG_WATCHDOG=y CONFIG_STM32_REMOTEPROC=y # CONFIG_STPMIC1_WATCHDOG is not set # CONFIG_SYSCON_REBOOT_MODE is not set +CONFIG_TEE=y CONFIG_THUMB2_BAREBOX=y CONFIG_USB_DWC2=y CONFIG_USB_DWC2_GADGET=y diff --git a/configs/platform-v7a/dts/bootstate.dtsi b/configs/platform-v7a/dts/bootstate.dtsi index 081ec804509b..c0cade1e705b 100644 --- a/configs/platform-v7a/dts/bootstate.dtsi +++ b/configs/platform-v7a/dts/bootstate.dtsi @@ -103,7 +103,8 @@ /** STM32MP1 ******************************************************************/ #if defined(stm32mp157c_lxa_mc1_dts) || \ defined(stm32mp157c_dk2_dts) || \ - defined(stm32mp157c_ev1_dts) + defined(stm32mp157c_ev1_dts) || \ + defined(stm32mp135f_dk_dts) / { aliases { state = &state_mmc0; diff --git a/configs/platform-v7a/rules/barebox-stm32mp.make b/configs/platform-v7a/rules/barebox-stm32mp.make index 5e4772565f1e..e39d7c12dbc9 100644 --- a/configs/platform-v7a/rules/barebox-stm32mp.make +++ b/configs/platform-v7a/rules/barebox-stm32mp.make @@ -50,7 +50,8 @@ BAREBOX_STM32MP_IMAGES := \ BAREBOX_STM32MP_FIP_DTBS := \ stm32mp157c-dk2.dtb \ stm32mp157c-ev1.dtb \ - stm32mp157c-lxa-mc1.dtb + stm32mp157c-lxa-mc1.dtb \ + stm32mp135f-dk.dtb BAREBOX_STM32MP_IMAGES := $(addprefix $(BAREBOX_STM32MP_BUILD_DIR)/,$(BAREBOX_STM32MP_IMAGES)) BAREBOX_STM32MP_FIP_DTBS := \ -- 2.39.2